NVIDIA Alone Has TSMC’s Advanced Packaging Lines Booked for Several Years Ahead, Leaving Little Room for Competitors

Muhammad Zuhair

Advanced packaging is becoming one of the biggest constraints for the AI industry, and according to a new report, NVIDIA has already secured a giant share of the CoWoS capacity.

NVIDIA Has Reserved More Than 50% of TSMC’s CoWoS Production, with Broadcom and AMD Following

We have covered specifics about advanced packaging quite a few times in the past week, but one of the more interesting information that has surfaced is that NVIDIA is projected to 'gobble up' more than half of TSMC's CoWoS capacity moving into 2026, which is likely to target the ongoing Blackwell Ultra rampup, as well as prepare for the next-generation Rubin architecture. A report by DigiTimes states that NVIDIA has booked 800,000 to 850,000 wafers for 2026, which represents a substantial allocation compared to what competitors like Broadcom and AMD have been allocated.

Related Story Google Is Reportedly A Major Intel Foundry Customer, Will Use EMIB Advanced Packaging For Next-Gen TPU

Despite the ongoing outsourcing efforts, TSMC still expects to retain the lion's share of CoWoS capacity, and it is expected that, following NVIDIA, Broadcom, and AMD, TSMC will be the largest advanced packaging customer. Interestingly, the current CoWoS orders at TSMC don't factor in the potential order flow coming in from China for NVIDIA's H200 AI chips, hence it won't be wrong to say that NVIDIA might be required to see a higher capacity allocation, which could prove to be a massive constraint, not just for TSMC, but also for competitors as well.

TSMC has been expanding its advanced packaging facilities, with the Chiayi AP7 plant seeing the development of eight different fabs. Similarly, the Taiwanese giant also plans to introduce two packaging plants in Arizona. Mass production in US facilities is anticipated to commence by 2028, which will help TSMC scale up capacity, but despite that, the supply will remain constrained.

As the AI industry shifts towards inference-focused solutions, ASIC is emerging as a key segment, with solutions like Google's TPUs seeing significant traction; however, volume production for external adoption remains a concern.

Muhammad Zuhair Photo

About the author: Muhammad Zuhair is a hardware and technology reporter for Wccftech, specializing in the semiconductor industry and the complex interplay between technology, manufacturing, and geopolitics. His coverage focuses on the corporate strategies and technological roadmaps of industry giants like TSMC, NVIDIA, Samsung, and Intel. Zuhair's expertise lies in deconstructing complex topics such as fabrication nodes (e.g., 2nm process), the economic impact of policies like the CHIPS Act, and the strategic development of AI infrastructure from NVIDIA, AMD and Intel.

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